Conventionally, when a semiconductor chip is mounted on a mounting board, conductive pads on the mounting board and conductive pads on the semiconductor chip are mechanically and electrically connected by metal bumps made of solder or the like.
As an integration degree of a semiconductor chip is made high and conductive pads are made finer, a current density flowing in the metal bump increases. Metal atoms constituting the metal bump become easy to move by electromigration. Motion of metal atoms may cause breaking of the bump. For example, if a solder bump is used, Sn as bump material is likely to move. As Sn moves and a region having a lower Sn density is formed, breaking is likely to occur in the lowered density region.
During solder is melted for bonding, the semiconductor chip and mounting board are heated to a high temperature. As the semiconductor chip and mounting board are cooled to a room temperature after mounting, a stress is generated due to a thermal expansion coefficient difference between the semiconductor chip and the mounting board. A thermal expansion coefficient of the mounting board is generally equal to or more than ten times a thermal expansion coefficient of the semiconductor chip. As the semiconductor chip and the mounting board are cooled to a room temperature, the mounting board contracts more than the semiconductor chip. A compressive stress is therefore applied to the semiconductor chip along an in-plane direction. As the stress is generated, the mechanically weakest region is broken. For example, metal bumps, low dielectric constant insulating material in semiconductor chips, and the like are broken. A similar stress is generated also by a temperature change during actual operation after mounting.
There are known techniques of connecting conductive pads of a mounting board and conductive pads of a semiconductor chip, by using carbon nanotubes (e.g., Patent Document 1). This connection method will now be described.
Carbon nanotubes are grown from conductive pads of a semiconductor chip by plasma enhanced chemical vapor deposition (PECVD). Proximal ends of the carbon nanotubes are buried in the conductive pads of the semiconductor chip, and distal ends of the carbon nanotubes are buried in conductive pads of a mounting board. Namely, both ends of the carbon nanotubes are connected by soldering to the conductive pads of the semiconductor chip and the mounting board. The semiconductor chip is therefore mechanically and electrically connected to the mounting board via the carbon nanotubes.
It is known that a density of current allowed to flow in one carbon nanotube is higher by two to three digits than that in metal. The carbon nanotube is resistant to breaking by electromigration.
Since carbon nanotubes have flexibility, the mounted semiconductor chip is able to move a little in the in-plane direction with respect to the mounting board. It is therefore possible to prevent the semiconductor chip from being broken by a mechanical stress caused by a thermal expansion coefficient difference.
When carbon nanotubes are formed on conductive pads of a semiconductor substrate, carbon nanotubes are generally grown by spraying catalytic metal such as Ni and Co on the conductive pads and using acetylene as source gas. In this case, a substrate temperature is required to be heated to about 600° C. However, as the semiconductor substrate is heated to a high temperature of about 600° C., the characteristics of a semiconductor element formed on the semiconductor substrate are deteriorated.
If carbon nanotubes are grown at a temperature not deteriorating a semiconductor element, e.g., at a low temperature of about 350° C., the quality of grown carbon nanotubes is low, and moreover a long growth time of several weeks is required.
Also disclosed are techniques of transferring carbon nanotubes grown on an alumina substrate or the like to conductive pads of a semiconductor substrate (e.g., Patent Documents 2 and 3). This method does not require growing carbon nanotubes directly on a semiconductor substrate. It is therefore possible to fix carbon nanotubes of high quality to conductive pads without heating the semiconductor substrate.
(Patent Document)
    Japanese Laid-open Patent Publication No. 2004-528727    Japanese Laid-open Patent Publication No. 2007-188662    Japanese Laid-open Patent Publication No. 2004-281388